Course Title: Digital Design Automation

Part A: Course Overview

Course Title: Digital Design Automation

Credit Points: 12.00


Course Code

Campus

Career

School

Learning Mode

Teaching Period(s)

EEET1256

City Campus

Postgraduate

125H Electrical & Computer Engineering

Face-to-Face

Sem 1 2006,
Sem 2 2006,
Sem 1 2007,
Sem 1 2008,
Sem 1 2009,
Sem 1 2010,
Sem 1 2011,
Sem 1 2012,
Sem 1 2013

Course Coordinator: Dr John Fang

Course Coordinator Phone: +61 3 9925 2432

Course Coordinator Email: john.fang@rmit.edu.au

Course Coordinator Location: 10.07.06


Pre-requisite Courses and Assumed Knowledge and Capabilities

To successfully complete this course, you should have the ability to manipulate basic Boolean logic and to have an introductory level knowledge of microprocessor based systems. For example, you will need to have successfully completed a digital logic or microprocessors course at second year undergraduate level or provide evidence of equivalent capabilities.


Course Description

The course will focus on design methodology, hardware modelling and high level synthesis.

You will develop hands-on experience in design using the hardware description language VHDL and its application to the development of logic systems on programmable logic (e.g. CPLD and FPGA).

The topic material will be supported by industry standard EDA tools for design, synthesis, simulation, verification and implementation of digital systems.


Objectives/Learning Outcomes/Capability Development


You will gain or improve capabilities in:
• Theoretical knowledge: you will learn to describe hardware systems in terms of Hardware Description Languages (structural and behavioural), - particularly VHDL. and will become familiar with the basic structures of various programmable logic types - PLD, CPLD, FPGA - and particularly how these structures affect the outcomes of the synthesis process.
• Technical ability: you will learn to use a range of industry standard EDA tools for compilation and synthesis of hardware systems.
• Communication and working in teams: your capabilities will be improved through the presentation of written and verbal reports, and group work in laboratory projects.


On successful completion of this course, you will be able to:
• use the hardware description language, VHDL, to describe moderately complex digital hardware systems
• carry out the design and synthesis of a moderately complex digital hardware system using a standard FPGA development platform.


Overview of Learning Activities

The learning activities in this course consist of lectures and laboratories.


Overview of Learning Resources

A DVD with all class material  will be made available.

Class material may also be accessed online.



Overview of Assessment

Assessment will be based on labs and project marks.

A mark of 30% or more must be achieved in all three assessment groups to be eligible for a pass in this subject.