Course Title: Semiconductor Device Fabrication (PG)

Part A: Course Overview

Course Title: Semiconductor Device Fabrication (PG)

Credit Points: 12.00


Course Code

Campus

Career

School

Learning Mode

Teaching Period(s)

EEET2045

City Campus

Postgraduate

125H Electrical & Computer Engineering

Face-to-Face

Sem 1 2006,
Sem 2 2006,
Sem 1 2007,
Sem 2 2007,
Sem 2 2008,
Sem 1 2009,
Sem 1 2010,
Sem 1 2011,
Sem 1 2012,
Sem 1 2013,
Sem 1 2014,
Sem 1 2016

EEET2045

City Campus

Postgraduate

172H School of Engineering

Face-to-Face

Sem 1 2017

EEET2155

City Campus

Undergraduate

125H Electrical & Computer Engineering

Face-to-Face

Sem 1 2006,
Sem 2 2006,
Sem 1 2009,
Sem 1 2010,
Sem 1 2011,
Sem 1 2012,
Sem 1 2013,
Sem 1 2014,
Sem 1 2016

EEET2155

City Campus

Undergraduate

172H School of Engineering

Face-to-Face

Sem 1 2017

Course Coordinator: A/Prof Anthony Holland

Course Coordinator Phone: +61 3 9925 2150

Course Coordinator Email: anthony.holland@rmit.edu.au

Course Coordinator Location: 10.08.09

Course Coordinator Availability: Email for appointment


Pre-requisite Courses and Assumed Knowledge and Capabilities

You are expected to be competent in mathematics, physics and have basic knowledge of electronics.


Course Description

The course will focus on the fabrication procedures which are used in industry to produce silicon semiconductor devices. The topic material will be supported where practicable by laboratory/clean room demonstrations and student activities relevant to the various processes presented in lectures.

The subject material is divided into five modules as follows:

  • Introduction of basic fabrication processes, materials and clean room protocols.
  • Photolithography, masking and patterning of materials.
  • Semiconductor oxidation and diffusion.
  • Ion implantation and thermal processing.
  • Metal and dielectric deposition for contacts, gate and interconnect engineering.


Objectives/Learning Outcomes/Capability Development

This course develops the following program learning outcomes of the Bachelor of Engineering (Honours):

     1.3 In-depth understanding of specialist bodies of knowledge within the engineering discipline.
     1.4 Discernment of knowledge development and research directions within the engineering discipline.
     2.1 Application of established engineering methods to complex engineering problem solving.
     2.2 Fluent application of engineering techniques, tools and resources.

This program contributes to the following program learning outcomes for the Master of Engineering (SECE):

  • High levels of technical competence in the field
  • Be able to apply problem solving approaches to work challenges and make decisions using sound engineering methodologies


On completion of this course you should be able to:

  1. Describe the clean room environment/laboratory procedures for chip fabrication.
  2. Explain the basic theory and practice of processing steps used in the fabrication of silicon chips.
  3. Describe the specialized equipment used in chip fabrication.
  4. Describe the integration and flow of the processing steps.
  5. Solve complex interconnected problems
  6. Work in a team environment with minimal direction from a supervisor.


Overview of Learning Activities

The course is based on a series of lectures covering the stated topics and laboratory demonstrations and activities. In addition, you are expected to undertake self-paced exercises in the topic material. In summary, the delivery methods will cover the following:

  • Lecture or equivalent material presentations;
  • Planned exercise work will focus on application of technical skills.
  • Supervised laboratory demonstrations and laboratory practice to enhance your technical competence; and
  • Self-paced exercises and problem solving.


Overview of Learning Resources

Learning resources for this course include:

  • Lecture Notes (as part of course learning guide) prepared by the teaching staff.
  • Prescribed textbook/s: See the course guide available at the start of classes.

Recommended reference books: See the course guide available at the start of classes.


Overview of Assessment

☒This course has no hurdle requirements.
☐ All hurdle requirements for this course are indicated clearly in the assessment regime that follows, against the relevant assessment task(s) and all have been approved by the College Deputy Pro Vice-Chancellor (Leaning & Teaching).

The assessment for this course comprises: Two class tests, Reports on laboratory assignments which include semiconductor fabrication, computer simulation and design projects; End of semester examination (two hours duration).

Assessment tasks 

Early Assessment Task: Class Test 1
Weighting 15%
This assessment task supports CLOs 1,2,3,

Assessment Task 2: Class Test 2
Weighting 15%
This assessment task supports CLOs 1,2,3,4

Assessment Task 3: Laboratory Assignment
Weighting 20%
This assessment task supports CLO 4,5,6

Assessment 4: Written Examination
Weighting 50%
This assessment supports CLOs 1,2,3,4,5