Course Title: Design embedded controller systems

Part B: Course Detail

Teaching Period: Term1 2012

Course Code: EEET6746C

Course Title: Design embedded controller systems

School: 130T Vocational Engineering

Campus: City Campus

Program: C6084 - Advanced Diploma of Computer Systems Engineering

Course Contact: Program Manager

Course Contact Phone: +61 3 99254468

Course Contact Email: engineering-tafe@rmit.edu.au


Name and Contact Details of All Other Relevant Staff

Sukhvir Singh Judge
email: sukhvir.judge@rmit.edu.au
Tel: 99254470

Nominal Hours: 80

Regardless of the mode of delivery, represent a guide to the relative teaching time and student effort required to successfully achieve a particular competency/module. This may include not only scheduled classes or workplace visits but also the amount of effort required to undertake, evaluate and complete all assessment requirements, including any non-classroom activities.

Pre-requisites and Co-requisites

Nil

Course Description

This unit covers designing control systems using microcontrollers, or PCs or embedded signal processors (DSPs). It encompasses working safely, following design briefs and applying knowledge of embedded system devices, interpreting device specifications, constructing prototypes, using appropriate development software, applying programming techniques, testing developed system prototype operation, verifying compliance of the design against the final brief and documenting design and development work.


National Codes, Titles, Elements and Performance Criteria

National Element Code & Title:

UEENEED052B Design embedded controller systems

Element:

Design and develop advanced embedded systems.

Performance Criteria:

3.1 Embedded system design is presented and explained
to client representative and/or other relevant
person(s).
3.2 Requests for design modifications are negotiated
with relevant person(s) within the constraints of
organisation policy.
3.3 Final design is documented and approval obtained
from appropriate person(s).
3.4 Quality of work is monitored against personal
performance agreement and/or established
organisational or professional standards.

Element:

Obtain approval for embedded systems design.

Performance Criteria:

2.1 OHS risk control work measures and procedures are
followed.
2.2 Knowledge of embedded devices and systems and
compliance standards are applied to the design.
2.3 Alternative arrangements for the design are
considered based on the requirements outlined in the
design brief.
2.4 Safety, functional and budget considerations are
incorporated in the design.
2.5 Prototype devices and circuits are constructed and
tested for compliance with the design brief and
regulatory requirements.
2.6 Prototype malfunctions are rectified and retested to
ensure effective operation of design.
2.7 Embedded system design is documented for
submission to appropriate person(s) for approval.
2.8 Solutions to unplanned situation are provided
consistent with organisation policy.

Element:

Prepare to design and develop advance embedded systems.

Performance Criteria:

1.1 OHS processes and procedures for a given work
area are identified, obtained and understood.
1.2 Established OHS risk control measures and
procedures are followed in preparation for the work.
1.3 The extent of the proposed embedded system
development is determined from the design brief or
in consultation with appropriate person(s).
1.4 Design development work is planned to meet
scheduled timelines in consultation with others
involved on the work site.
1.5 Materials and devices/components required for the
work are selected on compatibility of their
specifications with embedded system requirements
and project budget constraints.
1.6 Tools, equipment and testing devices needed to
carry out the work are obtained and checked for
correct operation and safety.


Learning Outcomes



Details of Learning Activities

Learning activities will inlcude lecture, tutorials, practical and project work


Teaching Schedule

WeekTopicAssessment Task
1Introduction to course, course guide, assessment, topics breakdown, resources, OHS issues etc
Combinational logic Analysis                                    

UEENEED052B 1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8, 3.1,3.2,3.3,3.4                                                                                                                                                                                                                                                                  
                                                 
2Combinational  logic analysis and design
UEENEED052B 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8
 
3Sequential logic analysis
UEENEED052B 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8
 
4Sequential Logic design
UEENEED052B 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8
 
5Introduction to student project, specifications, design brief, time lines
UEENEED052B 1.3,1.4,1.5,1.6
 
 6Selection of devices/components, time and budgetary constraints for the project, testing tools and test equipment
design documentation .
UEENEED052B 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,
 
 7 Design approval and negotiating the modifications:- Integrating combinational and sequential logic designs to develop a real life application
UEENEED052B 3.1,3.2,3.3
 
 8 Assessment 1 - Students to show the working model of their design problem (State machine design assignment)
UEENEED052B 1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8, 3.1,3.2,3.3,3.4                    
 Practical test
 9 Programming tools and techniques, prototyping and testing
UEENEED052B 2.1,2.2,2.3,2.4,2.5,2.6,2.7
 
 10 Input/output port programming
UEENEED052B 1.1,1.2,1.3,1.4,1.5,1.6
 
 11Testing and debugging techniques
UEENEED052B 2.1,2.2,2.3,2.4,2.5,2.6,2.7
 
 12Peripheral and hardware interfacing: Keypad. Display, power circuits etc 
 13Documenting the embedded design
UEENEED052B 2.7,3.3
 
 14Student project
UEENEED052B 1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8, 3.1,3.2,3.3,3.4           
 
 15Student project
UEENEED052B 1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8, 3.1,3.2,3.3,3.4           
 
 16Student project
UEENEED052B 1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8, 3.1,3.2,3.3,3.4           
 Project
 and  Report
 17Project Assessment
UEENEED052B 1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8, 3.1,3.2,3.3,3.4           
 Project
 and  Report
 18Review/reassessment
UEENEED052B 1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8, 3.1,3.2,3.3,3.4           
 


Learning Resources

Prescribed Texts

Embedded C programming and the ATMEL AVR by Richard Barnett, Larry O’Cull and Sarah Cox


References

ATmega 32 datasheet
AVR assembly language instruction set manual
AVR assembler user guide


Other Resources


Overview of Assessment

Practical test
Project
Report


Assessment Tasks

Assessment task 1 - Practical test: 25% (Week8)
CPLD implementation of a digital design: This will be a practical test in which students will implement and demonstrate their design in a CPLD. The design brief will be available on the learning hub and student’s local drive.

Assessment task 2 - Project: 60% (Week 16-17)
A hardware interfacing project:- Students will be required to  design, construct, test and debug the project hardware and software.  The project details will be available on the learning hub and student’s local drive.

Assessment task 3 - Report: 15% (Week 16-17)
A professionally written report: Student will write a report for their project in which they will document all their design, construction and testing procedures. The format of the report will be available on the learning hub and student’s local drive


Assessment Matrix

Competency CodeCompetency TitlePractical TestProjectReport
UEENEED052BDesign embedded controller systems                                                                                                                                           1.1,1.2,1.3,1.4,1.5,1.6
2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8
3.1,3.2,3.3,3.4
1.1,1.2,1.3,1.4,1.5,1.6
2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8
3.1,3.2,3.3,3.4
2.5,2.7
3.3

Other Information

Minimum student directed hours are 8 in addition to 72 scheduled teaching hours.
Student directed hours will involve project construction, writing project report etc.

Study and learning Support:

Study and Learning Centre (SLC) provides free learning and academic development advice to you.
Services offered by SLC to support your numeracy and literacy skills are:

assignment writing, thesis writing and study skills advice
maths and science developmental support and advice
English language development

Please Refer http://www.rmit.edu.au/studyandlearningcentre to find more information about Study and learning Support

Disability Liaison Unit:

If you are suffering from long-term medical condition or disability, you should contact Disability Liaison Unit to seek advice and
support to complete your studies.

Please Refer http://www.rmit.edu.au/disability to find more information about services offered by Disability Liaison Unit

Late submission:

If you require an Extension of Submittable Work (assignments, reports or project work etc.) for 7 calendar days or less (from the original due date) and have valid reasons, you must complete and lodge an Application for Extension of Submittable Work (7 Calendar Days or less) form and lodge it with the Senior Educator/ Program Manager.
The application must be lodged no later than one working day before the official due date. You will be notified within no more than 2 working days of the date of lodgment as to whether the extension has been granted.

If you seek an Extension of Submittable Work for more than 7 calendar days (from the original due date) must lodge an Application for Special Consideration form under the provisions of the Special Consideration Policy, preferably prior to, but no later than 2 working days after the official due date.

Submittable Work (assignments, reports or project work etc.) submitted late without approval of an extension will not be accepted or marked.


Special consideration:

Please Refer http://www.rmit.edu.au/browse;ID=riderwtscifm to find more information about special consideration
 
Plagiarism:

Plagiarism is a form of cheating and it is very serious academic offence that may lead to expulsion from the University.

Please Refer: www.rmit.edu.au/academicintegrity to find more information about plagiarism.

Other Information:

All email communications will be sent to your RMIT email address and you must regularly check your RMIT emails. 

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