Course Title: Troubleshoot digital subsystems

Part B: Course Detail

Teaching Period: Term1 2009

Course Code: EEET6751C

Course Title: Troubleshoot digital subsystems

School: 130T Vocational Engineering

Campus: City Campus

Program: C6085 - Advanced Diploma of Electrical - Technology

Course Contact: Ganesh Naik

Course Contact Phone: +61 3 99254252

Course Contact Email:

Name and Contact Details of All Other Relevant Staff

Ganesh Naik
PHONE: 9925 4252 FAX: (03) 99254377

Peter Lindorff

Luigi La Forgia

Nominal Hours: 80

Regardless of the mode of delivery, represent a guide to the relative teaching time and student effort required to successfully achieve a particular competency/module. This may include not only scheduled classes or workplace visits but also the amount of effort required to undertake, evaluate and complete all assessment requirements, including any non-classroom activities.

Pre-requisites and Co-requisites


Course Description

This unit covers determining correct operation of digital systems. It encompasses working safely, problem solving procedures, including the use of voltage, current and resistance measuring devices, providing solutions derived from measurements and calculations to predictable problems in digital components circuits.

National Codes, Titles, Elements and Performance Criteria

National Element Code & Title:

UEENEEH012B Troubleshoot digital subsystems


Complete work and document troubleshooting activities.

Performance Criteria:

1.1 OHS procedures for a given work area are obtained and understood.
1.2 OHS risk control work preparation measures and procedures are followed.
1.3 The nature of the fault is obtained from documentation or from work supervisor to establish the scope of work to be undertaken.
1.4 Advice is sought from the work supervisor to ensure the work is co-ordinated effectively with others.
1.5 Sources of materials that may be required for the work are established in accordance with established procedures.
1.6 Tools, equipment and testing devices needed to carry out the work are obtained and checked for correct operation and safety.


Prepare to troubleshoot digital subsystems.

Performance Criteria:

2.1 OHS risk control work measures and procedures are followed.
2.2 The need to test or measure live is determined in strict accordance with OHS requirements and when necessary conducted within established safety procedures.
2.3 Circuits are checked as being isolated where necessary in strict accordance OHS requirements and procedures.
2.4 Fault finding is approached methodically drawing on knowledge of digital components using easured and calculated values of parameters.
2.5 Unexpected situations are dealt with safely and with the approval of an authorised person.
2.6 Fault finding activities are carried out efficiently without unnecessary waste of materials or damage
to apparatus and the surrounding environment or services and using sustainable energy practices.


Troubleshoot digital subsystems.

Performance Criteria:

3.1 OHS work completion risk control measures and procedures are followed.
3.2 Work site is cleaned and made safe in accordance with established procedures. 
3.3 Justification for solutions used to troubleshooting problems is documented.
3.4 Work completion is documented and an appropriate person or persons notified in accordance with
established procedures

Learning Outcomes

Details of Learning Activities

The student must demonstrate an understanding of all elements of a particular competency to be deemed competent. Assessment methods have been designed to measure achievement of each competency in a flexible manner over a range of assessment tasks.
The learning activities will include lectures, class room tutorials, practical exercises and work simulated project/s.

Teaching Schedule

Week                                    Topic                                                                        Assessment Task
    1         Introduction to course, course guide, assessment, topics
               breakdown, resources, OHS issues etc
    2        Introduction to digital electronics                                                       Laboratory exercise -1
    3        Number systems                                                                                  Laboratory exercise -2
    4        Logic gates, timing diagrams and interfacing between
              different logic families                                                                         Laboratory exercise - 3
    5       Boolean Algebra and Logic simplification                                       Laboratory exercise -4
    6       Boolean Algebra and logic simplification                                        Laboratory exercise -5
    7       Logic simplification using K-maps                                                   Laboratory exercise -6
    8       Combinational logic analysis                                                             Laboratory exercise -7
    9       Combinational logic design                                                               Task1: Laboratory exercise submission 20%
    10     Common combinational logic circuits: Decoders,
             encoders, code converters, Multiplexers, demultiplexers etc             Student Project
    11     Latches and Flip-flops                                                                               Student Project
    12     Counters and shift registers                                                                     Student Project
    13     A/D and D/A converters                                                                              Student Project
    14     Display devices: LCDs and 7-Seg displays                                          Student Project
    15                 Student Project                                                                                Student Project
    16                 Student project                                                                                Student Project
    17                 Student project                                                                          Task 2: Student project submission- 40%
    18         Assessment feedback, catch-up test, laboratory
                 work catch-up.                                                                                   Task 3: written Exam 40%

Learning Resources

Prescribed Texts

Digital fundamentals by Thomas L. Floyd


Other Resources

Overview of Assessment

Practical test
Written Examination

Assessment Tasks

Assessment task 1 : 20%

Assessment task 1 will be a set of tutorial and practical exercises. All these exercises need to be completed by week 9. The practical exercises are accumulative ones and will be graded on submission of all laboratory reports during week 9. These tutorial/practical exercises will be available on learning hub and student’s local drive.

Assessment task 2: 40%
A Digital project: - Students will be required to construct and test a project based on PLDs or FPGAs and will be required to produce a project report. The project will commence on week 10 and students need to demonstrate the working project and submit the reports by week 17. The project details will be provided on the learning hub and student’s local drive.

Assessment task 3 : 40%
A Written Examination will be held on week 18 based on all the learning aspects of these competencies.

Assessment Matrix


Course Overview: Access Course Overview