Course Title: Design embedded controller control systems

Part B: Course Detail

Teaching Period: Term2 2014

Course Code: COSC6143C

Course Title: Design embedded controller control systems

School: 130T Vocational Engineering

Campus: City Campus

Program: C6122 - Advanced Diploma of Electronics and Communications Engineering

Course Contact: Program Manager

Course Contact Phone: +61 3 9925 4468

Course Contact Email: vocengineering@rmit.edu.au


Name and Contact Details of All Other Relevant Staff

Sukhvir Singh Judge

Telephone: +61 3 99254470

Email: sukhvir.judge@rmit.edu.au

Nominal Hours: 80

Regardless of the mode of delivery, represent a guide to the relative teaching time and student effort required to successfully achieve a particular competency/module. This may include not only scheduled classes or workplace visits but also the amount of effort required to undertake, evaluate and complete all assessment requirements, including any non-classroom activities.

Pre-requisites and Co-requisites

UEENEEE101A

Course Description

This unit covers designing control systems using microcontrollers, or PCs or embedded signal processors (DSPs). It encompasses working safely, following design briefs and applying knowledge of embedded system devices, interpreting device specifications, constructing prototypes, using appropriate development software, applying programming techniques, testing developed system prototype operation, verifying compliance of the design against the final brief and documenting design and development work.
Note: This unit applies to all aspects of Electrotechnology – engineering applications only. For general competencies related to Information Technologies refer to the latest endorsed IT Training Package.


National Codes, Titles, Elements and Performance Criteria

National Element Code & Title:

UEENEED152A Design embedded controller control systems

Element:

1. Prepare to design and develop advance embedded systems.

Performance Criteria:

1.1 OHS processes and procedures for a given work
area are identified, obtained and understood.
1.2 Established OHS risk control measures and
procedures are followed in preparation for the work.
1.3 The extent of the proposed embedded system
development is determined from the design brief or
in consultation with appropriate person(s).
1.4 Design development work is planned to meet
scheduled timelines in consultation with others
involved on the work site.
1.5 Materials and devices/components required for the
work are selected on compatibility of their
specifications with embedded system requirements
and project budget constraints.
1.6 Tools, equipment and testing devices needed to
carry out the work are obtained and checked for
correct operation and safety.
 

Element:

2. Design and develop advance embedded systems.

Performance Criteria:

2.1 OHS risk control work measures and procedures are
followed.
2.2 Knowledge of embedded devices and systems and
compliance standards are applied to the design.
2.3 Alternative arrangements for the design are
considered based on the requirements outlined in the
design brief.
2.4 Safety, functional and budget considerations are
incorporated in the design.
2.5 Prototype devices and circuits are constructed and
tested for compliance with the design brief and
regulatory requirements.
2.6 Prototype malfunctions are rectified and retested to
ensure effective operation of design.
2.7 Embedded system design is documented for
submission to appropriate person(s) for approval.
2.8 Solutions to unplanned situation are provided
consistent with organisation policy.
 

Element:

3. Obtain approval for embedded systems design.

Performance Criteria:

3.1 Embedded system design is presented and explained
to client representative and/or other relevant
person(s).
3.2 Requests for design modifications are negotiated
with relevant person(s) within the constraints of
organisation policy.
3.3 Final design is documented and approval obtained
from appropriate person(s).
3.4 Quality of work is monitored against personal
performance agreement and/or established organisational or professional standards.
 


Learning Outcomes


Refer to Elements


Details of Learning Activities

This course is delivered in a cluster (Microprocessor Applications 2) in conjunction with UEENEEH188A (EEET7043C). You must enrol in both courses delivered in this cluster. All the learning and assessment activities will include the components of both competencies UEENEED152A and UEENEEH188A.

You will involve in the following learning activities to meet requirements for the two clustered competencies and stage 1 competencies for Engineering Associates
• Classroom tutorial
• Practical activities
• Projects

 

Elements and Performance Criteria for UEENEEH188A (EEET7043C)

1 Prepare to design and develop electronics/computer systems projects.

1.1 OHS processes and procedures for a given work area are identified, obtained and understood.
1.2 Established OHS risk control measures and procedures are followed in preparation for the work.
1.3 The extent of the proposed project development is determined from the design brief or in consultations with appropriate person(s).
1.4 Project work is planned to meet scheduled timelines in consultation with others involved on the work site.
1.5 Resources required for the work are selected based on compatibility with project requirements and budget constraints.
1.6 Tools, equipment and testing devices needed to carry out the work are obtained and checked for correct operation and safety.

2 Design and develop electronics/computer systems projects.

2.1 OHS risk control work measures and procedures are followed.
2.2 Knowledge of devices and systems and compliance standards are applied to the design
2.3 Alternative arrangements for the design are considered based on the requirements outlined in the design brief.
2.4 Safety, functional and budget considerations are incorporated in the design.
2.5 Prototype hardware and/or software systems are constructed and tested for compliance with the design brief and regulatory requirements.
2.6 Prototype malfunctions are rectified and retested to ensure effective operation of design.
2.7 Project design is documented for submission to appropriate person(s) for approval.
2.8 Solutions to unplanned situation are provided consistent with organisation policy.

3 Obtain approval for the design.

3.1 The design is presented and explained to client representative and/or other relevant person(s).
3.2 Requests for modifications to the design are negotiated with relevant person(s) within the constraints of organisation policy.
3.3 Final design is documented and approval obtained from appropriate person(s).
3.4 Quality of work is monitored against personal erformance agreement and/or established organizational or professional standards.

Engineers Australia Mapping Information:
This course and another clustered competency are mapped against stage 1 competencies for Engineering Associates developed by Engineers Australia as detailed below:

EA1.1. Comprehensive, theory based understanding of the underpinning natural and physical sciences and the engineering fundamentals applicable to the engineering
EA1.2. Conceptual understanding of the, mathematics, numerical analysis, statistics, and computer and information sciences which underpin the engineering discipline.
EA1.3. In-depth understanding of specialist bodies of knowledge within the engineering discipline.
EA1.4. Discernment of knowledge development and research directions within the engineering discipline.
EA1.5. Knowledge of contextual factors impacting the engineering discipline.
EA1.6. Understanding of the scope, principles, norms, accountabilities and bounds of contemporary engineering practice in the specific discipline.
EA2.1. Application of established engineering methods to complex engineering problem solving.
EA2.2. Fluent application of engineering techniques, tools and resources.
EA2.3. Application of systematic engineering synthesis and design processes.
EA2.4. Application of systematic approaches to the conduct and management of engineering projects.
EA3.1. Ethical conduct and professional accountability.
EA3.2. Effective oral and written communication in professional and lay domains.
EA3.3. Creative, innovative and pro-active demeanour.
EA3.4. Professional use and management of information.
EA3.5. Orderly management of self and professional conduct.
EA3.6. Effective team membership and team leadership

Engineers Australia Stage 1 Competencies are mapped with cluster of competencies (UEENEED152A and UEENEEH188A) in the Assessment Matrix.


Teaching Schedule

The proposed teaching schedule for both clustered competencies  (UEENEED152A and UEENEEH188A) is detailed below:

WeekTopics DeliveredElements/Performance criteria
1Introduction to course, course guide, assessment, topics breakdown, resources, OHS issues etcUEENEED152A:1.1,1.2,1.3,1.4,1.5,1.6
UEENEEH188A:1.1,1.2,1.3,1.4,1.5,1.6,
 
2Introduction to fixed point processors
 
UEENEED152A:1.3,1.4,1.5,2.1,2.2,2.3,2.4
UEENEEH188A:1.3,1.4,1.5,2.1,2.2,2.3,2.4
 
3Programming model of a fixed point processorUEENEED152A:1.3,1.4,1.5,2.1,2.2,2.3,2.4,2.5,2.6
UEENEEH188A:1.3,1.4,1.5,2.1,2.2,2.3,2.4,2.5,2.6
 
4Assembly language programming of fixed point processorsUEENEED152A:.1.3,1.4,1.5,2.1,2.2,2.3,2.4,2.5,2.6,3.1,3.2
UEENEEH188A:1.3,1.4,1.5,2.1,2.2,2.3,2.4,2.5,2.6,3.1,3.2
 
5Software development techniques – C programming of a fixed point processor Design and development of prototype interfaces
Students will be able to start working on their project (Assessment no.2) after this week
 
UEENEED152A:1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,,2.8,3.1,3.2
UEENEEH188A:1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,,2.8,3.1,3.2 
 
6Exception processing and handling
Documenting the design development and the projects

Assignment: 20%

UEENEED152A:1.1,1.2,1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2
UEENEEH188A:1.1,1.2,1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2
 
7Implementing time critical functions – mixing c and assembly programming

 
UEENEED152A:1.1,1.2,1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2
UEENEEH188A:1.1,1.2,1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2
 
8Implementing time critical functions – mixing c and assembly programmingUEENEED152A:1.1,1.2,1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH188A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
 
9Implementing engineering algorithms using fixed point processorsUEENEED152A:1.1,1.2,1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH188A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
 
10Implementing engineering algorithms using fixed point processors
Construction and testing of prototype circuits
 
UEENEED152A:1.1,1.2,1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH188A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
 
11Integrated peripherals: GPIOs,SPI, Timers, A/D etc
, laboratory work catch-up.
 
UEENEED152A:1.1,1.2,1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH188A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
 
12Signal conditioning, A/D and D/A conversionsUEENEED152A:1.1,1.2,1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH188A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
 
13Hardware interfacingUEENEED152A:1.1,1.2,1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH188A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4

 
14Student projectUEENEED152A:1.1,1.2,1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH188A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
 
15

Student project

UEENEED152A:1.1,1.2,1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH188A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4

 
16Student project
Assessment 2: Submission of Project - 40%
 
UEENEED152A:1.1,1.2,1.3,1.4,1.5,1.6,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH188A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4 

 
17-18Exam: 40% (in either Week 17 or 18)
 
UEENEED152A:2.2,2.3
UEENEEH188A:2.2,2.3 

 


Learning Resources

Prescribed Texts

There is no prescribed text book for this course. Students will only use user manuals as detailed in reference books’ section


References

DSP56F800 user manual
DSP56800 family manual Code warrior Development studio for Motorola 56800/E Hybrid controllers: DSP56F80x/DSP56F82x Family Targetting Manual
 


Other Resources


Overview of Assessment

The assessment is conducted in both theoretical and practical aspects of the course according to the performance criteria set in the National Training Package. Assessment may incorporate a variety of methods including written/oral activities and demonstration of practical skills to the relevant industry standards. Participants are advised that they are likely to be asked to personally demonstrate their assessment activities to their teacher/assessor. Feedback will be provided throughout the course. To successfully complete this course you will be required to demonstrate competency in each assessment task detailed under Assessment Tasks:

Assessment 1: Assignment
Weighting towards final grade (%): 20

Assessment 2: Project
Weighting towards final grade (%): 40

Assessment 3: Final Test
Weighting towards final grade (%): 40

These tasks assesses the following Course Learning Outcomes (CLOs):

Assessment Mapping Matrix

Element/Performance Criteria CoveredAssignmentProjectFinal Test
1.1xx
1.2xx 
1.3xx 
1.4xx 
1.5xx 
1.6xx 
2.1xx 
2.2xxx
2.3xxx
2.4xx 
2.5xx 
2.6xx 
2.7xx 
2.8xx 
3.1xx 
3.2xx 
3.3 x 
3.4 x 

 


Assessment Tasks

• Assignment, 20%
• Project, 40%
• Exam, 20%
This course is graded as Competent or Not Yet Competent and subsequently the following course grades are allocated:
80 – 100: CHD – Competent with High Distinction
70 – 79: CDI – Competent with Distinction
60 – 69: CC – Competent with Credit
50 – 59: CAG – Competency Achieved – Graded
0 – 49: NYC – Not Yet Competent
DNS – Did Not Submit for Assessment.


Assessment Matrix

Assessment vs UEENEED152A Elements & Performance Criteria

 
UEENEED152A Elements & Performance Criteria
Assessments 1.11.21.31.41.51.62.12.22.32.42.52.62.72.83.13.23.33.4
Assignmentxxxxxx x xxxx  
Projectxxxxxxxxxxxxxxxxxx
Exam       xx         

 

Assessment vs UEENEEH188A Elements & Performance Criteria

 UEENEEH188A Elements & Performance Criteria
Assessments 1.11.21.31.41.51.62.12.22.32.42.52.62.72.83.13.23.33.4
Assignment xxxxxxxxxxxxxx x x  
Projectxxxxxxxxxxxxxxxxxx
Exam       xx         

 

Assessment vs Engineers Australia Stage 1 Competencies

 Engineers Australia Stage 1 Competencies
Assessments EA1.1EA1.2EA1.3EA1.4EA1.5EA1.6EA2.1EA2.2EA2.3EA2.4EA3.1EA3.2EA3.3EA3.3EA3.4EA3.5EA3.6
Assignment X X XX xXXXXXXXXXX
ProjectXXXXXXXXXXXXXXXXX
Exam  X    x X        
ALL ASSESSMENTS (UEENEED152A) 1 1 3 1 2 2 3 3 3 1 1 2 3 2 1 2 1
ALL ASSESSMENTS (UEENEEH188A)1 1 2 1 1 2 2 1 2 3 1 2 1 1 1 2 1
0 (Blank)Graduate attribute is not assessed.
1Graduate attribute is assessed in at least one, but less than one-third, of the Element.
2Graduate attribute is assessed in at least one third, but less than two-thirds, of the Element.
3Graduate attribute is assessed in more than two-thirds of the Element.

Other Information

• This course is delivered in a cluster (Microprocessor Applications 2) in conjunction with (Design and Develop electronic/computer system projects). All the learning and assessment activities will include the components of both UEENEED152A and UEENEEH188A.


• Student directed hours involve completing activities such as reading online resources, assignments, project work, individual student-teacher course-related consultation lab reports. Students are required to self-study the learning materials and complete the assigned out of class activities for the scheduled non-teaching hours. The estimated time is 38 hours outside the class time.
 


Study and Learning Support:

Study and Learning Centre (SLC) provides free learning and academic development advice to you. Services offered by SLC to support your numeracy and literacy skills are:

- Assignment writing, thesis writing and study skills advice
- Maths and science developmental support and advice
- English language development

Please Refer http://www.rmit.edu.au/studyandlearningcentre to find more information about Study and learning Support

Disability Liaison Unit:

If you are suffering from long-term medical condition or disability, you should contact Disability Liaison Unit to seek advice and support to complete your studies.

Please Refer http://www.rmit.edu.au/disability to find more information about services offered by Disability Liaison Unit

Late Submission:

If you require an Extension of Submittable Work (assignments, reports or project work etc.) for 7 calendar days or less (from the original due date) and have valid reasons, you must complete and lodge an Application for Extension of Submittable Work (7 Calendar Days or less) form and lodge it with the Senior Educator/ Program Manager.
The application must be lodged no later than one working day before the official due date. You will be notified within no more than 2 working days of the date of lodgement as to whether the extension has been granted.

If you seek an Extension of Submittable Work for more than 7 calendar days (from the original due date) must lodge an Application for Special Consideration form under the provisions of the Special Consideration Policy, preferably prior to, but no later than 2 working days after the official due date.

Submittable Work (assignments, reports or project work etc.) submitted late without approval of an extension will not be accepted or marked.

Special Consideration:

Please refer http://www.rmit.edu.au/students/specialconsideration to find more information about special consideration

Plagiarism:

Plagiarism is a form of cheating and it is very serious academic offence that may lead to expulsion from the University.

Please Refer: www.rmit.edu.au/academicintegrity to find more information about plagiarism.

Email Communication:

All email communications will be sent to your RMIT email address and you must regularly check your RMIT emails.

Course Overview: Access Course Overview