Course Title: Develop software solutions for microcontroller based systems

Part B: Course Detail

Teaching Period: Term1 2014

Course Code: EEET7050C

Course Title: Develop software solutions for microcontroller based systems

School: 130T Vocational Engineering

Campus: City Campus

Program: C6122 - Advanced Diploma of Electronics and Communications Engineering

Course Contact: Program Manager

Course Contact Phone: +61 3 9925 4468

Course Contact Email: vocengineering@rmit.edu.au


Name and Contact Details of All Other Relevant Staff

Sukhvir Singh Judge

Telephone: +61 3 99254470

Email: sukhvir.judge@rmit.edu.au
 

Nominal Hours: 60

Regardless of the mode of delivery, represent a guide to the relative teaching time and student effort required to successfully achieve a particular competency/module. This may include not only scheduled classes or workplace visits but also the amount of effort required to undertake, evaluate and complete all assessment requirements, including any non-classroom activities.

Pre-requisites and Co-requisites

UEENEEE101A

Course Description

This unit covers developing, implementing and testing programming solutions in microcontroller based systems. It encompasses following development brief, using appropriate development software, writing code, applying problem solving procedures, testing and modifying of programs.


National Codes, Titles, Elements and Performance Criteria

National Element Code & Title:

UEENEEH115A Develop software solutions for microcontroller based systems

Element:

1. Prepare to develop code.

Performance Criteria:

1.1 OHS processes and procedures for a given work area are obtained and understood.
1.2 Established OHS risk control measures and
procedures in preparation for the work are followed.
1.3 The extent of code development work is determined from job performance specifications and in consultations with relevant persons.
1.4 Activities are planned to meet scheduled timelines in consultation with others involved on the work.
1.5 Appropriate development kit and software are selected based on specified requirements and
performance standard.
1.6 Strategies are implemented to ensure programming is carried out efficiently.

Element:

2. Develop code.

Performance Criteria:

2.1 OHS risk control measures and procedures for carrying out the work are followed.
2.2 Correct syntax is applied when developing code.
2.3 Key features of the programming language used are applied to develop and test solutions.
Note: Key features may include use of registers, addressing modes, assembler instructions, subroutines and flags.
2.4 Approaches to issues/problems are analysed to provide most effective solutions.
2.5 Quality of work is monitored against personal performance agreement and/or established organizational or professional standards.

Element:

3. Test and document the development of code.

Performance Criteria:

3.1 Testing procedures are developed to analyse code.
3.2 Problems and bugs in code are rectified to ensure specifications are met.
3.3 Intermediate and final work reports are written in accordance with professional standards and presented to appropriate person or persons.


Learning Outcomes


Refer to Elements


Details of Learning Activities

You will involve in the following learning activities to meet requirements for the two clustered competencies (UEENEEH115A and UEENEEH148A) and stage 1 competencies for Engineering Asscoiates.

  • Classroom tutorial
  • Practical activities
  • Projects

Engineers Australia Mapping Information:

This course and other two clustered competencies are mapped against stage 1 competencies for Engineering Associates developed by Engineers Australia as detailed below:
EA1.1. Comprehensive, theory based understanding of the underpinning natural and physical sciences and the engineering fundamentals applicable to the engineering
EA1.2. Conceptual understanding of the, mathematics, numerical analysis, statistics, and computer and information sciences which underpin the engineering discipline.
EA1.3.In-depth understanding of specialist bodies of knowledge within the engineering discipline.
EA1.4. Discernment of knowledge development and research directions within the engineering discipline.
EA1.5. Knowledge of contextual factors impacting the engineering discipline.
EA1.6. Understanding of the scope, principles, norms, accountabilities and bounds of contemporary engineering practice in the specific discipline.
EA2.1. Application of established engineering methods to complex engineering problem solving.
EA2.2. Fluent application of engineering techniques, tools and resources.
EA2.3. Application of systematic engineering synthesis and design processes.
EA2.4. Application of systematic approaches to the conduct and management of engineering projects.
EA3.1. Ethical conduct and professional accountability.
EA3.2. Effective oral and written communication in professional and lay domains.
EA3.3. Creative, innovative and pro-active demeanour.
EA3.4. Professional use and management of information.
EA3.5. Orderly management of self and professional conduct.
EA3.6. Effective team membership and team leadership.

Engineers Australia Stage 1 Competencies are mapped with cluster of competencies UEENEE101A, UEENEEE102A, and UEENEEA115A in the Assessment Matrix.
 


Teaching Schedule

The proposed teaching schedule for both clustered competencies competencies UEENEEH115A and UEENEEH148A is detailed below:

 

Week Topics Delivered Elements/Performance criteria
1 Introduction to course, course guide, assessment, topics breakdown, resources, OHS issues etc
Combinational logic Analysis
UEENEEH148A:1.1,1.2, 1.3,1.4,1.5, 1.6, 2.1,2.2,2.3,2.4, 2.5, 2.6,2.7,2.8,3.1, 3.2,3.3,3.4
2 Combinational logic Analysis
Combinational logic design
Oscillators for digital circuits
 
UEENEEH148A:3.1,3.2,3.2,3.4, 2.1,2.2,2.3,2.4, 2.5,2.6,2.7,2.8
3 Sequential logic analysis UEENEEH148A:3.1,3.2,3.2,3. 4,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8
4 Sequential logic design
Students will be able to start working on their state machine design assignment (Practical test- Part1 No. 1) after this week
 
UEENEEH148A:2.1,2.2,2.3, 2.4,2.5,2.6,2.7,2.8,3.1, 3.2,3.3,3.4
5 Introduction to student project, specifications, design brief, time lines, test procedures, test equipment,
Selection of devices/components, testing tools and design documentation
Students will be able to start working on their project (Assessment no.2) after this week
 
UEENEEH148A:2.1,2.2,2.3,2.4, 2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH115A:2.1,2.2,2.3,2.4,2.5
 
6 Introduction to student project, specifications, design brief, time lines, test procedures, test equipment,
Selection of devices/components, testing tools and design documentation.
UEENEEH148A:2.1,2.2,2.3,2.4, 2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH115A:1.1,1.2,1.3,1.4, 1.5,2.1,2.2,2.3,2.4,2.5
 
7 Integrating combinational and sequential logic designs to design and develop a real life application, Introduction to prototyping UEENEEH148A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7, 2.8,3.1,3.2,3.3,3.4
8 8 Assessment 1 - Students to show the working model of their design problem (State machine design assignment)
Assessment1: Practical test -Part 2 due - 15%  
UEENEEH148A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
 
9 Programming tools and techniques UEENEEH115A:1.1,1.2,1.3,1.4,1.5,2.1,2.2,2.3,2.4,2.5
10  Input/output port programming, testing and debugging techniques UEENEEH115A:2.1,2.2,2.3,2.4,2.5,3.1,3.2,3.3
11  Interrupt handling and modular programming techniques UEENEEH115A:2.1,2.2,2.3,2.4,2.5,3.1,3.2,3.3
12 Timers, A/D subsystems Timers, A/D subsystems UEENEEH115A:2.1,2.2,2.3,2.4,2.5,3.1,3.2,3.3
13 Peripheral and hardware interfacing: Keypad. Display, power circuits etc UEENEEH148A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH115A:2.1,2.2,2.3,2.4,2.5,3.1,3.2,3.3
 
14 14 Analog interfacing using inbuilt A/D converter UEENEEH115A:2.1,2.2,2.3,2.4,2.5,3.1,3.2,3.3
15

Student project


UEENEEH148A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4 UEENEEH115A:1.1,1.2,1.3,1.4,1.5,2.1,2.2,2.3,2.4,2.5,3.1,3.2,3.3
 
16 Student project
Assessment 2: Submission of Project - 40%
 
UEENEEH148A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH115A:1.1,1.2,1.3,1.4,1.5,2.1,2.2,2.3,2.4,2.5,3.1,3.2,3.3
 
17-18 17-18 Assessment 3: Closed book test - 40% UEENEEH148A:1.1,1.2,1.3,1.4,1.5,1.6, 2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,3.1,3.2,3.3,3.4
UEENEEH115A:1.1,1.2,1.3,1.4,1.5,2.1,2.2,2.3,2.4,2.5,3.1,3.2,3.3
 


Learning Resources

Prescribed Texts


References

ATmega 32 datasheet
AVR assembly language instruction set manual
AVR assembler user guide Embedded C programming and the ATMEL AVR by Richard Barnett, Larry O’Cull and Sarah Cox


Other Resources


Overview of Assessment

The assessment is conducted in both theoretical and practical aspects of the course according to the performance criteria set in the National Training Package. Assessment may incorporate a variety of methods including written/oral activities and demonstration of practical skills to the relevant industry standards. Participants are advised that they are likely to be asked to personally demonstrate their assessment activities to their teacher/assessor. Feedback will be provided throughout the course. To successfully complete this course you will be required to demonstrate competency in each assessment task detailed under Assessment Tasks:

Assessment 1: Practical Assignment – Part 1
Weighting towards final grade (%): 5

Assessment 2: Practical Assignment – Part 2
Weighting towards final grade (%): 15

Assessment 3: Project
Weighting towards final grade (%): 40

Assessment 4: Test
Weighting towards final grade (%): 40

These tasks assesses the following Course Learning Outcomes (CLOs):

Assessment Mapping Matrix

Element/Performance Criteria Covered Practical Assignment Project Test
Parts 1 & 2
1.1 x x x
1.2 x x x
1.3 x x x
1.4 x x x
1.5 x x x
1.6 x x x
2.1   x x
2.2   x x
2.3   x x
2.4   x x
2.5   x x
3.1   x x
3.2   x x
3.3   x x

  


Assessment Tasks

  • Practical Test - Part 1, 5%
  • Practical Test-Part 2,15%
  • Project, 40%
  • Test, 40%

This course is graded as Competent or Not Yet Competent and subsequently the following course grades are allocated:
80 - 100: CHD - Competent with High Distinction
70 - 79: CDI - Competent with Distinction
60 - 69: CC - Competent with Credit
50 - 59: CAG - Competency Achieved - Graded
0 - 49: NYC - Not Yet Competent
DNS - Did Not Submit for Assessment


Assessment Matrix

Assessment vs UEENEEH115A Elements & Performance Criteria

 
UEENEEH115A Elements & Performance Criteria
Assessments 1.1 1.2 1.3 1.4 1.5 1.6 2.1 2.2 2.3 2.4 2.5 3.1 3.2 3.3
Assignment x x x x x x                
Project x x x x x x x x x x x x x x
Test x x x x x x x x x x x x x x

 

Assessment vs UEENEEH148A Elements & Performance Criteria

  UEENEEH141A Elements & Performance Criteria
Assessments 1.1 1.2 1.3 1.4 1.5 1.6 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 3.1 3.2 3.3 3.4
Assignment  x x x x x x x x x x x x x x        
Project x x x x x x x x x x x x x x x x x x
Test x x x x x x x x x x x x x x x x x x

 

Assessment vs Engineers Australia Stage 1 Competencies

   Engineers Australia Stage 1 Competencies
Assessments EA1.1 EA1.2 EA1.3 EA1.4 EA1.5 EA1.6 EA2.1 EA2.2 EA2.3 EA2.4 EA3.1 EA3.2 EA3.3 EA3.4 EA3.5 EA3.6
Assignment  X  X  X X   X X X X X X X X X
Project X X X X X X X X X X X X X X X X
Test  X X           X     X X X X X
ALL ASSESSMENTS UEENEEH115A 2  2  3  0  3  1  3  3  3  1  1  3  3  2  1 1
ALL ASSESSMENGS UEENEEH148A   3  3  3  0  3  1  3  3  3  1  1  3  3  2  1  0
0 (Blank) Graduate attribute is not assessed
1 Graduate attribute is assessed in at least one, but less than one-third, of the Element
2 Graduate attribute is assessed in at least one third, but less than two-thirds, of the Element
3 Graduate attribute is assessed in more than two-thirds of the Element

Other Information

  • Student directed hours involve completing activities such as reading online resources, assignment, individual student-teacher course-related consultation. Students are required to self-study the learning materials and complete the assigned out of class activities for the scheduled non-teaching hours. The estimated time is 12 hours outside the class time.
     


Study and Learning Support:

Study and Learning Centre (SLC) provides free learning and academic development advice to you. Services offered by SLC to support your numeracy and literacy skills are:

- Assignment writing, thesis writing and study skills advice
- Maths and science developmental support and advice
- English language development

Please Refer http://www.rmit.edu.au/studyandlearningcentre to find more information about Study and learning Support

Disability Liaison Unit:

If you are suffering from long-term medical condition or disability, you should contact Disability Liaison Unit to seek advice and support to complete your studies.

Please Refer http://www.rmit.edu.au/disability to find more information about services offered by Disability Liaison Unit

Late Submission:

If you require an Extension of Submittable Work (assignments, reports or project work etc.) for 7 calendar days or less (from the original due date) and have valid reasons, you must complete and lodge an Application for Extension of Submittable Work (7 Calendar Days or less) form and lodge it with the Senior Educator/ Program Manager.
The application must be lodged no later than one working day before the official due date. You will be notified within no more than 2 working days of the date of lodgement as to whether the extension has been granted.

If you seek an Extension of Submittable Work for more than 7 calendar days (from the original due date) must lodge an Application for Special Consideration form under the provisions of the Special Consideration Policy, preferably prior to, but no later than 2 working days after the official due date.

Submittable Work (assignments, reports or project work etc.) submitted late without approval of an extension will not be accepted or marked.

Special Consideration:

Please refer http://www.rmit.edu.au/students/specialconsideration to find more information about special consideration

Plagiarism:

Plagiarism is a form of cheating and it is very serious academic offence that may lead to expulsion from the University.

Please Refer: www.rmit.edu.au/academicintegrity to find more information about plagiarism.

Email Communication:

All email communications will be sent to your RMIT email address and you must regularly check your RMIT emails.

Course Overview: Access Course Overview