Course Title: Semiconductor Device Fabrication
Part A: Course Overview
Course Title: Semiconductor Device Fabrication
Credit Points: 12.00
Terms
Course Code |
Campus |
Career |
School |
Learning Mode |
Teaching Period(s) |
EEET2045 |
City Campus |
Postgraduate |
125H Electrical & Computer Engineering |
Face-to-Face |
Sem 1 2006, Sem 2 2006, Sem 1 2007, Sem 2 2007, Sem 2 2008, Sem 1 2009, Sem 1 2010, Sem 1 2011, Sem 1 2012, Sem 1 2013, Sem 1 2014, Sem 1 2016 |
EEET2045 |
City Campus |
Postgraduate |
172H School of Engineering |
Face-to-Face |
Sem 1 2017, Sem 1 2018, Sem 1 2019, Sem 1 2020, Sem 1 2021, Sem 1 2022, Sem 1 2023 |
EEET2155 |
City Campus |
Undergraduate |
125H Electrical & Computer Engineering |
Face-to-Face |
Sem 1 2006, Sem 2 2006, Sem 1 2009, Sem 1 2010, Sem 1 2011, Sem 1 2012, Sem 1 2013, Sem 1 2014, Sem 1 2016 |
EEET2155 |
City Campus |
Undergraduate |
172H School of Engineering |
Face-to-Face |
Sem 1 2017, Sem 1 2018, Sem 1 2019, Sem 1 2020, Sem 1 2021, Sem 1 2022, Sem 1 2023, Sem 1 2025 |
Course Coordinator: Prof. Anthony Holland
Course Coordinator Phone: +61 3 9925 2150
Course Coordinator Email: anthony.holland@rmit.edu.au
Course Coordinator Location: 10.08.09
Course Coordinator Availability: Email for appointment
Pre-requisite Courses and Assumed Knowledge and Capabilities
There is no pre-requisite course, however, it is advantageous to have a basic knowledge of electronics.
Course Description
The course will focus on the fabrication procedures which are used in industry to produce semiconductor devices. The topic material will be supported where practicable by laboratory/clean room demonstrations and student activities relevant to the various processes presented in lectures.
The subject material is divided into five modules as follows:
- Introduction of basic fabrication processes, materials and clean room protocols.
- Photolithography, masking and patterning of materials.
- Semiconductor oxidation and diffusion.
- Ion implantation and thermal processing.
- Metal and dielectric deposition for contacts, gate and interconnect engineering.
This course includes a work integrated learning experience in which your knowledge and skills will be applied and assessed in a real or simulated workplace context and where feedback from industry and/ or community is integral to your experience.
Objectives/Learning Outcomes/Capability Development
Program Learning Outcomes
This course contributes to the program learning outcomes for the programs:
BH073IP - Bachelor of Engineering (Electronic and Computer Systems Engineering) (Industry Practice) (Honours) (Major: Electronic & Communication Engineering)
BH073P23 - Bachelor of Engineering (Electronic and Computer Systems Engineering) (Honours) (Major: Electronic & Communication Engineering)
BH111ECH23 - Bachelor of Engineering (Electronic and Computer Systems Engineering)(Honours)/Bachelor of Business (Major: Electronic & Communication Engineering)
PLO 2. Demonstrate a coherent and advanced body of knowledge within the engineering discipline
PLO 3. Demonstrate advanced knowledge of the scope, principles, norms, accountabilities, bounds, design practice and research trends of contemporary engineering practice including sustainable practice
PLO 5. Utilise mathematics, software, tools and techniques, referencing appropriate engineering standards and codes of practice, in the design of complex engineering systems
PLO 6. Use a systems engineering approach to synthesize and apply procedures for design, prototyping and testing to manage complex engineering projects.
PLO 11. Collaborate and contribute as an effective team member or leader in diverse, multi-disciplinary teams, with commitment to First Nations peoples and/or globally inclusive perspectives and participation in an engineering context.
For more information on the program learning outcomes for your program, please see the program guide.
Upon successful completion of this course, you will be able to:
CLO1 Apply specialist knowledge of the clean room environment/laboratory procedures for semiconductor device (chip) fabrication.
CLO2 Deconstruct the silicon chip fabrication scheduling process utilising advanced theoretical and practical rationales.
CLO3 Justify a process flow design based on required specialised silicon chip fabrication equipment.
CLO4 Transform circuit diagrams into integrated circuit layout patterns using software tools and advanced knowledge for silicon chip fabrication.
CLO5 Solve complex interconnected problems for optimal chip design.
CLO6 Collaborate in a team using professional behaviours, processes and standards.
Overview of Learning Activities
The course is based on a series of pre-recorded lectures covering the stated topics, There will also be lectorials, tutorials and laboratory activities. Some laboratory sessions will be delivered on campus and others online. In addition, you are expected to undertake self-paced exercises on the topic material. In summary, the delivery methods will cover the following:
Lectorial and tutorial presentations which allow student interaction and which align with recorded lecture presentations,
Self-paced exercises and problem solving work will focus on application of technical skills,
Supervised laboratory demonstrations and laboratory practice to enhance your technical competence. For students who cannot attend on campus, the demonstrations will be online. There will be simulation lab work which will be online for all students and is the focus of the lab report assessment.
Overview of Learning Resources
Learning resources for this course include:
- Lecture Notes (as part of course learning guide) prepared by the teaching staff.
- Prescribed textbook/s: See the course guide available at the start of classes.
Recommended reference books: See the course guide available at the start of classes.
Overview of Assessment
Assessment Task 1: Quiz, 15%, CLO1, CLO2 and CLO3
Assessment Task 2: Test, 30%, CLO2, CLO3, CLO4 and CLO5
Assessment Task 3: Lab reports, 25%, CLO4, CLO5 and CLO6
Assessment Task 4: Written assignment, 30%, CLO3, CLO4 and CLO5
If you have a long-term medical condition and/or disability it may be possible to negotiate to vary aspects of the learning or assessment methods. You can contact the program coordinator or Equitable Learning Services if you would like to find out more.