Course Title: Advanced Digital Design 2

Part A: Course Overview

Course Title: Advanced Digital Design 2

Credit Points: 12.00

Terms

Course Code

Campus

Career

School

Learning Mode

Teaching Period(s)

EEET2163

City Campus

Undergraduate

125H Electrical & Computer Engineering

Face-to-Face

Sem 2 2007,
Sem 2 2010,
Sem 2 2011,
Sem 2 2012,
Sem 2 2013,
Sem 2 2014,
Sem 2 2015

EEET2476

RMIT University Vietnam

Undergraduate

172H School of Engineering

Face-to-Face

Viet2 2018,
Viet2 2019,
Viet2 2020,
Viet3 2020,
Viet2 2021,
Viet2 2022,
Viet2 2023,
Viet2 2024

Course Coordinator: Paul Beckett

Course Coordinator Phone: +61 3 99255301

Course Coordinator Email: pbeckett@rmit.edu.au

Course Coordinator Location: 10.10.12


Pre-requisite Courses and Assumed Knowledge and Capabilities

Electronic circuit design at 2nd year undergraduate level is sufficient.


Course Description

EEET2163  – Advanced Digital Design 2 focuses on the implementation of Application Specific Integrated Circuits. Students will implement a small IC design using Cadence Virtuoso. 

The course topics introduce the basic concepts and techniques used in modern Digital IC design, focussing specifically on small feature size CMOS technology. These cover the complete range of digital integrated circuit design from concept to implementation on silicon. A significant part of the course is taken up by a design project in which students design a small part of an integrated circuit on advanced graphics workstations. The main topics covered include: design methodology, logic and circuit simulation, geometric layout; circuit structures and techniques; testing and design for test and low-power design.

In this course you will learn to design digital integrated circuits. You will design and lay out a small part of an integrated circuit, ready for manufacture. You will learn layout techniques for an advanced CMOS (45nm bulk) process. You will learn to simulate CMOS circuits using Cadence Spectre (Spice). You will learn IC design rule constraints and optimisation of cells for a deep sub-micron process.

Please note that if you take this course for a bachelor honours program, your overall mark in this course will be one of the course marks that will be used to calculate the weighted average mark (WAM) that will determine your award level. (This applies to students who commence enrolment in a bachelor honours program from 1 January 2016 onwards. See the WAM information web page for more information (www1.rmit.edu.au/browse;ID=eyj5c0mo77631).


Objectives/Learning Outcomes/Capability Development

This course contributes to the following Program Learning Outcomes:

1.3 In-depth understanding of specialist bodies of knowledge within the engineering discipline.

2.1 Application of established engineering methods to complex engineering problem solving.

2.2 Fluent application of engineering techniques, tools and resources


In this course you will learn about Digital IC design, including the following topics

  • Static and Dynamic logic
  • Sequential Logic in IC
  • Datapaths and Memories
  • Testing and Design for Test

You will also learn about the tools required for IC design including:-

  • Design capture and simulation using Virtuoso
  • Physical design tools (layout & extraction)
  • Design rules

Specific topics include:

  • Design and Manufacture of VLSI chips
  • Different technologies
  • nMOS, CMOS, mixed signal...
  • Architectural decisions
  • Full custom design
  • Concept through to Silicon
  • Low-power design methods


Overview of Learning Activities

 This course is conducted via laboratory and projects. You will learn by doing in this course. The lecture material will provide pointers to the design literature in digital synthesis. Most of your learning will take place in the context of the laboratory exercises and the projects.


Overview of Learning Resources

Learning resources will be available on "myRMIT" in the EEET2163 area.


Overview of Assessment

Assessment for the subject is via laboratory exercises, a projects and a 2hr. final theory examination.