Course Title: Engineering Quality Assurance and Testing

Part A: Course Overview

Course Title: Engineering Quality Assurance and Testing

Credit Points: 12.00

Terms

Course Code

Campus

Career

School

Learning Mode

Teaching Period(s)

EEET2578

RMIT University Vietnam

Undergraduate

860H School of Science, Engineering and Technology

Face-to-Face

 Viet2 2019,
Viet1 2020,
Viet1 2021,
Viet1 2022,
Viet1 2023

Course Coordinator: Dr. Minh Dinh

Course Coordinator Phone: +84 28 36 22 44 20

Course Coordinator Email: minh.dinh4@rmit.edu.vn

Course Coordinator Location: 2.4.27 Saigon South Campus

Course Coordinator Availability: TBA


Pre-requisite Courses and Assumed Knowledge and Capabilities

 Before commencing this course, you must complete ISYS2089 Software Engineering Fundamentals and INTE2512 Object-Oriented Programming.


Course Description

 

Quality Assurance & Testing are important to ensure that hardware and software products having adequate quality when they are put in use. In this course, you will learn the fundamental concepts, standards, methodologies and tools in quality assurance and hardware/software testing. Major topics include but not limited to:
  • Quality Assurance frameworks
  • Hardware/software testing methodologies
  • Hardware/software testing tools
  • Industry standards
  • Industry best practices in QA and testing.
This course provides students a strong understanding and capability in performing work in the area of Quality Assurance & Testing for both hardware and software products.


Objectives/Learning Outcomes/Capability Development

This course contributes to the following Program Learning Outcomes (PLOs):

1.3. In-depth understanding of specialist bodies of knowledge within the engineering discipline. 2.1. Application of established engineering methods to complex engineering problem solving. 2.2. Fluent application of engineering techniques, tools and resources. 2.3. Application of systematic engineering synthesis and design processes. 


 

On completion of this course, students should be able to achieve the following Course Learning Outcomes (CLOs): 
  1. Understand basic concepts and techniques used in hardware and software validation and verification
  2. Create a test plan to outline activities and tasks involved in assuring quality of a system under test (SUT) throughout the full development life cycle. 
  3. Strategically apply appropriate techniques to deal effectively with diverse requirements of different kinds of SUTs (mobile, web, etc.)
  4. Use available tools and software for executing test cases, keeping track of test results and automate the test process.
  5. Write quality test reports and effectively communicate with other teams. 


Overview of Learning Activities

Learning activities will take the form of:

  • Lectures
  • Tutorials/Labs
  • Assignments/Projects


Overview of Learning Resources

Learning resources will consist of recommended references and class notes which may be accessed via RMIT LMS.

The set of references is deliberately broad, including books, journal publications, government reports, industry standards and handbooks, and web-based resources.

Students can use laboratory equipment and computer software within the School for the lab and assignment work.


Overview of Assessment

This course has no hurdle requirements. The following will be used to assess competency and learning:

  • Laboratories
  • Class tests
  • Group project 
To assist in the development of your skills, detailed feedback will be provided for each assessment task.   Assessment Tasks   Assessment Task 1: Laboratories (20%) This assessment supports CLOs 1, 2, 4   Assessment Task 2: Class tests (30%) This assessment supports CLOs 1, 3   Assessment Task 3: Group project (50%) This assessment supports CLOs 1, 2, 3, 4 and 5